A semiconductor cleanroom is the production space where wafers are patterned and processed, held to ISO 14644-1 particle classes and to tight limits on temperature, humidity, vibration, airborne chemicals and static, and Paul Industries designs, builds, pipes, starts up, services and maintains it along with the systems that feed the tools. That scope runs from the room and its air system through the ultrapure water and DI plant, process cooling water, high-purity process and gas piping, chemical distribution, wastewater and reclaim, compressed air and plant utilities, in all 50 states, with same-day emergency response. This page is written for facilities directors, tool-install leads and engineering firms planning work in a fab or an advanced packaging plant. It stays at the facility level and links out where a topic has its own page.
What is a semiconductor cleanroom?
It is a sealed, continuously filtered manufacturing hall in which particles, chemical vapors, vibration and electrostatic charge are all held low enough that they do not print as defects on a wafer. Air enters through the ceiling, sweeps straight down past the tools and returns through the floor, and the building around that air path carries the utilities each tool needs.
The clean room in semiconductor manufacturing behaves like part of the production machine. Air handling, floor structure, utility mains and tool connections are planned as one system, since a fault in any of them turns into yield loss on wafers already in process. The Semiconductor Industry Association puts a wafer at up to 1,400 process steps and about 12 weeks of cycle time, so one excursion can touch many lots before a test result reveals it. General room construction, envelope and certification are covered on our cleanrooms page; what follows is what a fab adds to that work.
How clean is a semiconductor clean room?
Process bays typically run between ISO 3 and ISO 6, and wafers themselves travel in still cleaner air inside sealed carriers and tool enclosures. ISO 3 allows 35 particles of 0.5 micron or larger per cubic meter and 1,000 of 0.1 micron or larger; ISO 5 allows 3,520 and 100,000 at those same sizes, so each step between classes is a tenfold change.
The class is only the first line of the specification for a semiconductor fab clean room. ISO 14644-1 counts particles from 0.1 to 5 microns, while the devices being built carry features far below that range, which is why owners add surface, chemical and water-borne limits of their own. A room that passes its particle count can still fail the process if a sealant is outgassing or a water line is shedding metals.
Semiconductor cleanroom class by area of the fab
The class is set area by area, so one plant holds several: the strictest air surrounds the exposed wafer and looser air fills the space around it. The figures below are typical published practice, and the owner’s basis of design governs any real project.
| Area | Typical ISO class | Legacy term | Particles 0.5 micron and larger per cubic meter | Why it sits there |
|---|---|---|---|---|
| Wafer carrier stockers and tool minienvironments | ISO 3 or cleaner | Class 1 or cleaner | 35 or fewer | The only place the bare wafer meets air on an automated line |
| Lithography bay | ISO 3 to ISO 5 | Class 1 to Class 100 | 35 to 3,520 | Patterning is the most defect-sensitive step; the tight end applies where handling is open |
| General process bay on a 300 mm automated line | ISO 5 to ISO 6 | Class 100 to Class 1,000 | 3,520 to 35,200 | Sealed carriers protect the wafer, so the room can relax |
| Service chase in a bay-and-chase plant | Around ISO 7 | Class 10,000 | 352,000 | Holds tool back ends, pumps and service access |
| Advanced packaging hall | Wide range, ISO 6 for conventional assembly to ISO 3 reported for hybrid bonding | Class 1,000 to Class 1 | 35,200 to 35 | Newer packaging steps approach front-end cleanliness |
| Subfab and utility levels | Set by the owner, far looser than the fab | Varies | Varies | Equipment space, kept clean enough to protect openings into the room above |
Those semiconductor fab cleanroom class choices shifted with automation. Older bays with open cassettes were filtered to ISO 3 across the room, while published accounts of 300 mm plants describe rooms specified at ISO 5 to ISO 6 because the front-opening unified pod, or FOUP, keeps product enclosed. The trade-off is that a degraded room leaves the pod and the tool enclosure as the only protection, so their seals and purge systems become critical equipment.
What is a class 100 semiconductor cleanroom?
It is a room allowing no more than 100 particles of 0.5 micron or larger per cubic foot of air, the old Federal Standard 209E name for what ISO 14644-1 now calls ISO 5, at 3,520 per cubic meter. The federal standard was withdrawn in 2001, yet the name survives in tool documents and purchase specifications, so a request for class 100 should be restated as an ISO class, a particle size and an occupancy state before anyone prices it. Our guide to ISO 14644 cleanroom classifications carries the full limit tables and sampling rules. For semiconductor cleanroom classification, the extra question to settle is which zones are classed in operation with tools running, because tool exhausts and moving automation change the count.
Semiconductor clean room requirements beyond the particle count
A fab also sets limits on airflow, temperature, humidity, vibration, airborne molecular contamination, electrostatic charge and the code treatment of hazardous materials, and each one sets specific demands on the people building the space. The table reads them from the installer’s side.
| Requirement | Typical basis | What it demands of the work |
|---|---|---|
| Airflow | Unidirectional air through ULPA-grade filters, ceiling to perforated floor | Sealed ceiling grid, scanned filters, balanced floor tiles, return paths kept clear of pipe racks |
| Temperature and humidity | Tool and process sheets; bands narrow sharply in lithography | Stable make-up air, sensible cooling coils, sensors placed where tools see the air |
| Vibration | Generic vibration criteria in RMS velocity: VC-C 12.5, VC-D 6.25, VC-E 3.12 micrometers per second | Isolated pumps and fans, flexible connections, pipe supports routed away from sensitive slab zones |
| Airborne molecular contamination | SEMI F21 classes for acids, bases, condensables, dopants and metals; ISO 14644-8 chemical grading | Approved low-outgassing sealants and coatings, gas-phase filters, a material log kept through the build |
| Electrostatic charge | SEMI E78 for equipment, SEMI E129 for the factory including construction materials and furniture | Dissipative floors and surfaces, grounded metal systems, ionization, continuity testing at turnover |
| Hazardous production materials | Group H-5 under IBC Section 415.11, IFC Chapter 27, NFPA 318 | Exhausted enclosures, gas detection, sprinklers in gas cabinets, welded supply lines for the most hazardous service |
Semiconductor clean room temperature and humidity
No single standard fixes the setpoint, so it comes from the process and the tool sheets; published operating cleanrooms commonly sit near 20 degrees Celsius (68 degrees Fahrenheit) and 40 to 50 percent relative humidity. Bands range from about 1 degree Celsius in general bays to roughly 0.1 degree in lithography and electron-beam zones. Temperature matters because wafers and tool stages change dimension with it, and humidity matters because photoresist behavior and static both follow moisture in the air. Holding those bands calls for steady heat removal from tool loads at the same time as humidity control in the make-up air, so the room’s air system and the plant’s chilled water are designed together.
Semiconductor cleanroom standards that reach the job site
The governing documents are ISO 14644 for air cleanliness, the SEMI series for contaminants, static, materials, welds and leak testing, ASTM D5127 for water, ASME B31.3 for piping, and the fire and building codes for hazardous materials. Knowing which trade each one binds keeps them out of the argument at turnover.
| Document | What it covers | Where it shows up on the job |
|---|---|---|
| ISO 14644-1, ISO 14644-8 | Particle classes; air chemical cleanliness by concentration | Room certification and chemical monitoring plan |
| SEMI F21, SEMI E78, SEMI E129 | Molecular contaminant classes; electrostatic control for equipment and factory | Material approvals, floor and surface selection |
| ASTM D5127, SEMI F63, SEMI F61 | Water grades by device line width; ultrapure water purchasing criteria and system design | Water plant design basis and acceptance limits |
| SEMI F57 | Polymer materials and components for ultrapure water and liquid chemical distribution | Pipe, valve and fitting submittals |
| SEMI F20, SEMI F78, SEMI F81, SEMI F1 | 316L stainless for high-purity parts; orbital welding practice; weld visual acceptance; gas system leak integrity | Weld procedures, inspection records and leak test reports |
| SEMI E51 | Typical facilities services and termination matrix at the point of connection | Tool hook-up scope split and facility-ready state |
| ASME B31.3, including Chapter X High Purity Piping | Process piping design, fabrication, examination and testing | Piping specification and test packages |
| IBC Section 415.11, IFC Chapter 27, NFPA 318 | Group H-5 occupancy, hazardous production materials, fire protection | Permit drawings, gas rooms, detection and life safety |
| 40 CFR Part 469 | Federal effluent limits for the semiconductor subcategory | Wastewater plant basis and discharge permit |
Semiconductor fab layout: cleanroom, subfab and utility levels
A typical fab stacks a utility level, a subfab, the production floor and an interstitial fan deck, so clean air arrives from above while utilities rise from below. Each level has its own contractor logic and its own routing conflicts.
- Utility level. Facility equipment and power distribution, plus the main headers for water, cooling and gases as they enter the building.
- Subfab. Systems that serve tools directly from underneath, including vacuum pumps, abatement units, chemical valve boxes, cooling skids and life-safety equipment.
- Production floor. Tools, automation rails and raised floor, usually carried on a waffle slab whose openings pass return air and utility drops between levels.
- Interstitial and fan deck. Fan filter units or air handling that deliver filtered air down through the ceiling.
In a cleanroom semiconductor fab, every drop through the slab is a planned opening with a sleeve, a seal and a named owner, because an unplanned core through a waffle slab can compromise both structure and airflow. Lithography commonly gets its own side of the building on a thicker floor, with rotating equipment kept away from it. The full waffle-and-subfab arrangement belongs mainly to 300 mm production: lab, pilot and many 150 mm or 200 mm lines can often use slab on grade or a partial subfab, at lower construction and hook-up cost, which is worth testing before the structure is drawn.
Semiconductor cleanroom design decisions that lock early
The design comes down to a handful of early choices: bay-and-chase or open ballroom, filter coverage, how much protection moves into minienvironments, floor structure and utility routing. Each one is costly to reverse once the shell is standing.
Bay-and-chase splits clean aisles from dirtier service space, which saved money when the whole bay had to be extremely clean. A ballroom removes those walls and leaves one large room, gives tool layout more freedom and holds uniform pressure around minienvironments that would otherwise straddle two zones, and it suits plants where sealed carriers already protect the wafer. Semiconductor fab design then works backward from the process flow: the tool list sets utility loads, the loads set main sizes and plant capacity, and the expansion plan sets the valved stubs left for later phases. Sizing mains only for the first tool set is the classic false economy here, since a later tie-in means work above running production. Our cleanroom design and construction guide walks through the general sequence these decisions feed into.
Semiconductor water treatment at the facility level
Water treatment for a fab covers the whole site water balance: pretreating incoming water, making and distributing ultrapure water, reclaiming rinse water, and treating fluoride, acid and slurry streams before discharge. Published figures put large plants at up to about 10 million gallons of ultrapure water a day, so the water plant is a major building in its own right.
Ultrapure water for semiconductor manufacturing is specified against ASTM D5127 and SEMI F63, with limits that apply at the point of distribution, so semiconductor cleanroom water quality is judged where the water reaches the tools. The treatment train, resistivity, TOC and loop detail live on our ultrapure water systems page. Lower-grade duty is handled by the industrial DI water systems we build for laboratory loops, scrubbers and utility makeup, and both grow out of the same front-end work covered under high-purity water systems.
| Water system | What it does | Facility-level design point |
|---|---|---|
| Site pretreatment | Conditions municipal or well water for the membranes downstream | Design to the seasonal worst case of feed water, with redundancy on the steps that protect RO |
| Ultrapure water make-up and polish | Semiconductor ultrapure water treatment from RO through final polish | Space, power and analyzer access, located to keep loop runs short |
| Distribution to tools | Continuous supply and return past each tool connection | Spare capacity for future tools, isolation that lets one branch come down alone |
| Rinse water reclaim | Collects cleaner rinse streams for reuse in utilities or back in the water plant | Segregated drains and monitoring so a contaminated batch diverts automatically |
| Fluoride and acid wastewater | Treats hydrofluoric acid rinses and neutralizes acid and caustic streams | Federal semiconductor limits for fluoride are 32.0 mg/L one-day maximum and 17.4 mg/L 30-day average; local limits can be stricter |
| Slurry wastewater | Separates solids from chemical mechanical planarization rinse | Abrasion-resistant piping, solids handling, and a separate collection line |
Semiconductor cleanroom water treatment planning pays off most in the drains. Singapore’s national water agency reports that a wafer plant can reach at least 50 percent recycling if waste streams are segregated during design, and segregation is far easier to pipe on day one than to retrofit under a running floor. We design and build the collection, treatment and discharge side under process wastewater and effluent systems.
What a process cooling water semiconductor loop has to deliver
Process cooling water, or PCW, is a closed, treated loop that removes heat from tool chambers, RF generators, lasers, pumps and power supplies, typically at a supply temperature in the mid to high teens Celsius with stable pressure and controlled water chemistry. Published fab practice runs about 14 to 18 degrees Celsius, and the tool’s facilities sheet sets the real number for each connection.
Several points separate this loop from ordinary plant cooling. Water chemistry comes first, because water passes close to electrically live parts inside the tools: university fabs report tool requests ranging from about 50 kilohm to 1.5 megohm-centimeter, and newer plants often run DI or near-DI water, held by a side stream through ion exchange or by bleeding the return and adding DI makeup. Pressure comes next, since low return pressure limits water entering a process chamber if an internal line leaks. Then continuity: lost flow means lost temperature control and scrapped wafers, so plants add standby pumps and generator backing, and some use a buffer tank to ride through a power dip. Leak and flood protection matters too, given how close these lines run to tools.
The loop rejects its heat through plate exchangers to the plant’s chilled water system, and that plant sizing, including chillers for smaller sub-loops, is part of the same load study described on our process cooling systems page.
Piping materials and joining for high-purity fab service
Fab piping is chosen by what the fluid would pull from the wall: PVDF for ultrapure water, PFA with secondary containment for aggressive chemicals, electropolished 316L stainless for high-purity gases, and treated-water materials for cooling loops. Joining and acceptance testing are written into the same specification as the material.
| Service | Usual material | Joining | Acceptance before turnover |
|---|---|---|---|
| Ultrapure water | High-purity PVDF to SEMI F57 | Bead-free or infrared fusion with logged parameters | Rinse-up to resistivity, TOC and particle limits |
| Acids, caustics, HF and solvents | PFA tubing, often coaxial with an outer containment tube; PVDF for selected mains | Heat-formed or welded joints; connections inside contained, drained boxes | Pressure test, purge, chemical purity sampling |
| Bulk and specialty gases | Electropolished 316L stainless to SEMI F20 | Autogenous orbital welds to SEMI F78, visual acceptance to SEMI F81 | Leak test to SEMI F1, then moisture, oxygen and particle checks |
| Process cooling water | Stainless or compatible plastic, chosen to the loop chemistry | Welded, fused or flanged by material | Hydrostatic test, flush, water chemistry in range |
| Clean dry air | Clean-bore stainless or other approved low-particle tubing | Orbital or clean mechanical joints | Dew point, particle and oil checks; about -40 C or lower is commonly specified |
| Process vacuum and exhaust | Corrosion-resistant pipe and duct chosen for each exhaust class | Welded, fused or gasketed by service | Leak test, airflow balance, abatement function test |
The fire code shapes joint selection as well. IFC Chapter 27 calls for supply lines carrying hazardous production gases and liquids with a health-hazard ranking of 3 or 4 to be welded throughout, with exceptions for gas connections inside a ventilation enclosure and for liquid connections with approved drainage or containment, so mechanical fittings gather inside exhausted or contained valve boxes. Our welders run the procedures described under orbital welding services, the spools and racks come from the same shop and field crews as our process piping work, and the instrument and tool air side follows our compressed air piping practice, taken to the dryness and filtration a fab asks for, with ISO 8573-1 Class 0 commonly specified.
The semiconductor fab construction process, from shell to tool hook-up
The sequence runs from basis of design and permits through shell, utility mains, clean build, certification, tool move-in and hook-up, then qualification. On semiconductor fab design and construction work, the proof for each step is agreed in advance, because every later step sits on top of it.
| Step | Work | What closes it |
|---|---|---|
| 1. Basis of design | Tool list, utility matrix, classes, vibration zones, expansion plan | Owner sign-off on load tables |
| 2. Permits | Air and water permits, H-5 code review, hazardous materials inventory | Issued permits, agreed fire protection approach |
| 3. Shell and structure | Foundations, waffle slab, structural frame | Vibration survey against the design criteria |
| 4. Central plant and mains | Water plant, chillers, gas yard, chemical rooms, main headers | Pressure, leak and flush records by system |
| 5. Clean build | Envelope, ceiling grid, filters, raised floor, final wipe-down under protocol | ISO 14644-1 certification of the room |
| 6. Purity qualification | Rinse-up of water loops, purge and sampling of gas and chemical mains | Results against owner limits at the distribution point |
| 7. Tool move-in | Rigging path, floor protection, setting on pedestals | Tool set and leveled to its layout |
| 8. Tool hook-up | Branch lines, drops, drains, exhaust and power to each point of connection | Test packages per service, facility-ready release |
| 9. Startup and qualification | Tool startup and process qualification alongside your process team | Punch list closed, turnover package delivered |
Semiconductor cleanroom construction under a clean protocol
Building the room moves through staged cleanliness zones: as the space closes up, access, tools, materials and clothing get progressively more controlled, and materials are wiped and bagged before entering. Fabricated spools arrive capped and bagged, and every sealant, coating and gasket used near the air path is checked against the owner’s approved list so that a chemical source is never built into the room. How we run the room scope itself is set out on our cleanroom contractor page.
Tool hook-up
Tool hook-up connects each tool’s points of connection to the facility mains, usually through a valve manifold box or chemical distribution box that feeds several tools from one header and lets one tool be isolated without interrupting the others. SEMI E51 is the usual reference for what services arrive at each connection. The work is won in preparation: a hook-up matrix per tool, prefabricated drops, and test packages per line. Validation and commissioning records then carry forward from the same line numbers into the turnover package.
How long does it take to build a semiconductor fab?
An average of about 682 days from construction start to first production, across roughly 635 greenfield fabs built worldwide from 1990 to 2020, according to Georgetown University’s Center for Security and Emerging Technology, with pre-permitting and pre-construction time on top. The Americas averaged 736 days, and the United States rose from 665 days in 1990 to 2000 up to 918 days in 2010 to 2020.
The Semiconductor Industry Association and Boston Consulting Group describe a broader window of two to four years to build a fab and put it into commercial production. Semiconductor fab construction schedules are mostly decided by permits, long-lead equipment and skilled labor: a federal advisory council estimated 12 to 18 months of permitting for larger projects. For facility owners the practical lesson is to order long-lead chillers, water plant packages and switchgear early, and to prefabricate as much pipe as possible.
How much does it cost to build a semiconductor fab?
A state-of-the-art fab of standard capacity requires roughly $5 billion for advanced analog to $20 billion for advanced logic and memory, including land, building and equipment, according to that same 2021 industry study. Process equipment accounts for most of it, so utilities and construction are the smaller share of a very large number.
Facility cost follows the same variables seen in any cleanroom, multiplied: class, filter coverage, subfab depth, redundancy and the amount of high-purity distribution per tool. Our cleanroom cost guide gives ranges for classified space at more ordinary scales. Federal support also affects budgets: the CHIPS and Science Act of 2022 set aside about $39 billion for manufacturing incentives, and its Section 48D advanced manufacturing credit, now 35 percent for property placed in service after 2025, applies to projects whose construction begins before 2027.
How much power does a semiconductor fab use?
A large fab can draw on the order of 100 megawatts continuously, and McKinsey has compared a typical plant’s annual consumption to that of about 50,000 homes. Process tools take a large share, and much of the remainder goes to the facility systems Paul installs: chillers, air handling, exhaust, pumps and water treatment.
Because those systems run around the clock, modest choices compound. Lower pressure drop in air paths and pipe mains, warmer chilled water wherever tools accept it, and heat recovery between loops are cheaper to design in than to retrofit, and they belong in the first load study.
How Paul Industries carries the fab systems scope
Paul Industries takes the facility systems around the tool as one package: the room, the water, the cooling, the piping and the utilities, from design through long-term service. We design and engineer the systems, fabricate spools and skids in the shop and field, install them, wire and program controls, test and flush, start up, support qualification, then maintain and repair them, with same-day emergency response in all 50 states. Owners who want a single point of responsibility can use our turnkey process systems delivery; those in the middle of a project can hand us one package, such as PCW or tool hook-up, and we carry it to turnover. Send your tool list, utility matrix, classes and schedule through request a quote, and we will return a scope and plan built on those loads.
Standards referenced: ISO 14644-1 · ISO 14644-8 · SEMI F21 · SEMI E78 · SEMI E129 · SEMI E51 · SEMI F1 · SEMI F20 · SEMI F57 · SEMI F61 · SEMI F63 · SEMI F78 · SEMI F81 · ASTM D5127 · ASME B31.3 · IFC Chapter 27 · IBC Section 415.11 · NFPA 318 · 40 CFR Part 469
Frequently asked questions
What is the difference between a bay and a chase in a fab?
A bay is the clean aisle where wafers are handled and tools are loaded. A chase is the adjoining service corridor where tool back ends, pumps and utility connections sit, usually at a looser class such as around ISO 7. The wall between them keeps maintenance activity away from wafer handling.
Why do 300 mm fabs run a looser room class than older lines?
Because automated lines carry wafers in sealed pods that dock directly with tool enclosures, so the bare wafer rarely meets room air. Cleaning an entire hall to ISO 3 is expensive, and moving that protection into small volumes saves air handling, filters and power.
What is a FOUP, and why does it affect the building?
A front-opening unified pod is the sealed carrier that holds 300 mm wafers between tools. It drives ceiling-mounted automation rails, stocker space and floor loading, and it means tool enclosures and pod purge systems share responsibility with the room for wafer cleanliness.
What equipment sits in a subfab?
Typically vacuum pumps, exhaust abatement, chemical valve boxes, chillers and heat exchangers serving individual tools, RF and power racks, and life-safety systems. Those units go below the tool so that their heat, vibration and maintenance traffic stay out of the production floor.
What is a valve manifold box in a fab?
It is an enclosed, exhausted distribution point that takes a gas or chemical main and splits it into several tool feeds, each with its own isolation valves. It lets one tool be serviced or swapped while its neighbors keep running, and it collects mechanical connections where leaks can be detected and exhausted.
Can a new tool be hooked up while the rest of the fab keeps running?
Yes, and that is the normal case in a producing plant. Spare valved outlets on boxes and mains let crews tie in a new tool without disturbing neighbors, and the work follows clean protocols, approved hot-work rules and agreed windows for any header connection.
What does SEMI F21 classify?
Airborne molecular contaminant levels in clean environments, grouped into families such as molecular acids, bases, condensables and dopants, with metals added in recent revisions. Owners use it to state limits for bays and tool environments, and to specify filters and monitors against them.
Which vibration class do lithography tools need?
The tool maker's installation specification decides it. The generic criteria run from VC-A at 50 micrometers per second to VC-E at 3.12, with VC-E described for the most demanding systems. Many modern tools publish their own curves, which may be stricter at specific frequencies.
What occupancy group applies to a semiconductor fab?
Building codes based on the International Building Code generally treat fabrication areas using hazardous production materials as Group H-5, with Section 415.11 and International Fire Code Chapter 27 setting the requirements. Local amendments vary, so the adopted edition is confirmed early with the authority having jurisdiction.
What are hazardous production materials?
In fire code terms, they are solids, liquids or gases used directly in research, laboratory or production processes whose end products are themselves not hazardous. Common fab examples include silane, arsine and hydrofluoric acid, and their storage, piping and detection follow special code provisions.
Why is PVDF used for ultrapure water piping in fabs?
It leaches very little, sheds few particles, resists a broad range of chemicals and joins by bead-free fusion, leaving a smooth bore. Components are tested for leach-out under SEMI F40 and F57, and its large thermal expansion is handled by supports and offsets.
Why are chemical lines often run in PFA with an outer tube?
PFA resists concentrated acids and solvents and adds very little contamination to the chemical. The outer tube catches any leak from the inner line and carries it to a monitored point, which protects people and tools and gives early warning before a spill reaches the floor.
How is a high-purity gas line accepted before a tool sees it?
After welding and inspection, the line is leak tested, commonly with helium against SEMI F1 limits, then purged with clean gas until analyzers show moisture, oxygen and particles at the owner's limits. Those results are filed by line number in the test package.
How pure does process cooling water need to be?
Pure enough to meet the tool's stated resistivity and corrosion limits, which vary widely by tool. Newer plants often run DI or near-DI water with filtration and a side stream through ion exchange, and they watch resistivity, pH and dissolved oxygen as ongoing health checks.
What federal limits apply to semiconductor wastewater?
40 CFR Part 469 sets limits for the semiconductor subcategory, including fluoride, total toxic organics and pH, and local pretreatment programs may be stricter. Discharge limits therefore feed directly into how many separate drain systems the building needs from the start.
Is a looser class acceptable for advanced packaging?
For conventional assembly, often yes; a research line may run die attach and wire bonding in Class 1,000. Newer steps change that, because stacked wafer surfaces need clean standards approaching the front end, so the class is set per process step and is reviewed before the room is sized.
What should we send Paul to scope a fab utility package?
A tool list with facilities sheets, the utility matrix, area classes, drawings of existing mains, tie-in constraints, the schedule and any owner-approved material lists. Partial information is enough for a first scope and budget, which then tightens as tool data firms up.
Can one contractor carry both the room and the utilities?
Yes. Paul carries the envelope, air systems, water, cooling, gas, chemical and utility piping under one plan. That keeps slab penetrations, ceiling coordination and test sequence under one schedule, and it gives the owner one party answerable for how those systems work together at turnover.
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